Charge redistribution data converters are commonly used to convert bipolar (i.e. two polarities) analog signals into a digital code that retains sign information. A variety of bipolar digital codes may be used when digitally representing bipolar analog signals as discussed in Analog-Digital Conversion Handbook by The Engineering Staff of Analog Devices (Analog Devices, Inc., 1976, pages II-17 to II-25). A common digital code used to represent bipolar analog signals in charge redistribution data converters is sign magnitude. Another frequently implemented digital code is offset binary. Digital signal processing (DSP) circuits are often designed to process operands in two's complement form because processing operands in two's complement form is fast and efficient for particular arithmetic operations. Because charge redistribution circuits typically utilize a digital bipolar code other than two's complement, a conversion from one of several common bipolar digital codes must be made. Mathematically, to convert from sign magnitude code to two's complement code a check of the most significant bit (MSB) must be made. If the MSB is a logic "one", the remaining bits must be complemented and a logic "one" added to the sign magnitude code. If the MSB is a logic "zero", no conversion has to be made. Previously, conversion of data from one of several bipolar digital codes to two's complement code has been implemented by either utilizing additional digital circuitry which converts a predetermined bipolar code provided by a converter into two's complement code or by using a software program which is executed by the processor which the A/D converter is supporting. However, the additional conversion circuitry utilizes integrated circuit area which is typically not cost effective, and the software program requires processor time which may be more effectively utilized and which creates delay in the conversion process.
Mathematically, offset binary code is easier to convert to two's complement code than sign magnitude code because the conversion is made by merely complementing the MSB. However, offset binary code always requires the use of the MSB to provide sign information. In sign magnitude code, by knowing whether a positive reference voltage or a negative reference voltage is being used by the converter circuit, the sign of the output signal is automatically known. Therefore, the MSB in sign magnitude code may be used for magnitude information rather than sign information. As a practical matter, only eleven bits are used in a twelve-bit converter for magnitude data in offset binary code. In contrast, all twelve bits may be used for magnitude data in sign magnitude code thereby allowing an extra bit of resolution. Therefore, an extra bit of resolution always exists for any given size of converter using sign magnitude code.
In order to implement a converter of predetermined resolution, twice the area is required in offset binary code as opposed to sign magnitude or two's complement code. In high-order converters using offset binary code, the addition of an extra bit of resolution requires a substantial increase in converter size. For example, in a capacitive offset binary code converter twice the number of capacitors is required to implement an extra bit of resolution. Further, since converters which implement offset binary code use two reference voltages and no fixed ground voltage, a zero input level may not correspond to a zero output code if the positive and negative reference voltages are not symmetrical with respect to a ground reference. An inaccurate zero reference level may create an unacceptable pedestal when a zero input level is applied. Therefore, data converters which provide binary codes do not typically readily provide outputs in two's complement code.